JPH03103626U - - Google Patents
Info
- Publication number
- JPH03103626U JPH03103626U JP1131590U JP1131590U JPH03103626U JP H03103626 U JPH03103626 U JP H03103626U JP 1131590 U JP1131590 U JP 1131590U JP 1131590 U JP1131590 U JP 1131590U JP H03103626 U JPH03103626 U JP H03103626U
- Authority
- JP
- Japan
- Prior art keywords
- data
- bit
- addresses
- coefficient
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Filters That Use Time-Delay Elements (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Complex Calculations (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1131590U JPH0741213Y2 (ja) | 1990-02-07 | 1990-02-07 | Firフィルタ |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1131590U JPH0741213Y2 (ja) | 1990-02-07 | 1990-02-07 | Firフィルタ |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH03103626U true JPH03103626U (en]) | 1991-10-28 |
JPH0741213Y2 JPH0741213Y2 (ja) | 1995-09-20 |
Family
ID=31514847
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1131590U Expired - Fee Related JPH0741213Y2 (ja) | 1990-02-07 | 1990-02-07 | Firフィルタ |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0741213Y2 (en]) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004015709A1 (ja) * | 2002-08-07 | 2004-02-19 | Sony Corporation | 適応ノイズ低減方法及び装置 |
-
1990
- 1990-02-07 JP JP1131590U patent/JPH0741213Y2/ja not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004015709A1 (ja) * | 2002-08-07 | 2004-02-19 | Sony Corporation | 適応ノイズ低減方法及び装置 |
Also Published As
Publication number | Publication date |
---|---|
JPH0741213Y2 (ja) | 1995-09-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH03130984A (ja) | Lifo方式の半導体記憶装置およびその制御方法 | |
CA2070668A1 (en) | Address processor for a signal processor | |
JPS63278411A (ja) | 多段デジタル・フィルタ | |
JPH03103626U (en]) | ||
JPH0846487A (ja) | フィルタリング方法およびその方法に用いられるデジタルフィルター | |
US4757469A (en) | Method of addressing a random access memory as a delay line, and signal processing device including such a delay line | |
JPH07501167A (ja) | 一連の積の和を形成する方法および装置 | |
JP2513179B2 (ja) | カウンタ付直列−並列変換回路 | |
JPH0784870A (ja) | 記憶回路 | |
JP2855936B2 (ja) | データ入れ替え方式 | |
JPS5839380A (ja) | 文字列制御装置 | |
JP2969645B2 (ja) | タイムスロット入替回路 | |
JP2853203B2 (ja) | 音声信号遅延装置 | |
JP2526042Y2 (ja) | メモリ・レジスタ制御回路 | |
JP2941001B2 (ja) | 時間軸伸張装置 | |
JPH0477967A (ja) | メモリ使用方式 | |
KR20010024466A (ko) | Ram을 사용하여 시프트 레지스터를 에뮬레이팅하는방법 | |
JPH0756805A (ja) | メモリアクセス方法 | |
JPH0264719A (ja) | Rom関数データ・テーブル回路 | |
JPS5995500U (ja) | 記憶装置 | |
JPH04245556A (ja) | 命令メモリ | |
JPS585128U (ja) | エンコ−ド回路 | |
JPH0514128A (ja) | デイジタルフイルタ | |
JPS63191723U (en]) | ||
JPH03171844A (ja) | ビットインターリーブメモリ制御回路とデビットインターリーブメモリ制御回路 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |